The USB 2.0 Specification defines three speeds of communication: low-speed (1.5 Mbps), full-speed (12 Mbps), and high-speed (480 Mbps). Aside from the speed differences, each of these signaling rates also has unique signaling characteristics. Thus, a USB analyzer, which sits passively on the bus and monitors bus traffic, must be able to handle each of these operating modes appropriately. FIG. 1a illustrates a common setup for the USB analyzer where a target host 10 transmits information to the target device 12 and a protocol analyzer 14 analyzes the traffic between the target host 10 and the target device 12. An analysis computer 16 can be setup to interact with the protocol analyzer 14 in the examination of such traffic.
The USB protocol specifies a set of differential signals to transmit data across a bus which are called D+ and D−. These two lines can potentially have four different line-states, however only three states are valid in the USB specification. These three valid line-states are called J, K, and SE0, and they are illustrated in FIG. 1b for the three USB speeds: full-speed (FS), low-speed (LS), and high-speed (HS). It is important to note that the J line-state also designates the idle state of the bus for the FS and LS buses, and SE0 is the idle line-state for high-speed. It is also important to note that LS and FS signaling have opposite polarities for their J and K line-states, and HS signaling runs at a much lower signaling level (400 mV compared to 3.3V). Thus, each signaling rate can be uniquely described by its idle line-state.
The problem is that most HS capable PHYs can only effectively monitor a single speed during any one time period, and must therefore be configured to that speed (LS mode, FS mode, or HS mode). Furthermore, auto speed detection of other products and technologies is known to be unreliable. Robust USB analyzers must be able to monitor all USB speeds, and must therefore be capable of determining the speed of the bus and configuring the PHY appropriately. The quick detection of these bus speeds is especially necessary in situations where the bus may be changing back and forth between speeds. An example of this would be during the high-speed negotiation process, in which the analyzer must quickly switch to a HS mode from a FS mode in order to capture the negotiation. Thus it would be desirable to have reliable methods for correctly determining the speed of the USB bus.